Electrical & Thermal Models
3D PLUS standard products feature high density and high electrical performance.
They are used in high performance and advanced digital electronic applications where component density, data bus width (up to 128-bit wide) and operating frequency (up to 900MHz) require extensive design work and PWB layout simulations to check/verify signal integrity, EMI, and transition response.
The preferred simulation model for 3D PLUS Stacks is the IBIS Model (I/O Buffer Information Specification). It gives the behavioral description of the I/O buffers and package characteristics of a stack.
3D PLUS stacks IBIS models are non-coupled lumped LCR models derived from TDR measurements in order to reflect the exact characteristics of the 3D technology package and of the semiconductor devices embedded in the stack.
IBIS or EBD models are available on demand for standard products. Specific models can be developed on customers’ request.
3D PLUS technology has the unique capability to stack n-High any heterogeneous active devices in a single highly miniaturized package. Because of the very high miniaturization achieved, the power dissipation density increases in the stack in the same proportion than its overall volume decreases.
As the electrical performances and the reliability of the products are directly related to the junction temperature of the embedded semiconductor devices, the thermal behavior and characteristics of each 3D PLUS stack are carefully designed, simulated and tested during the product development flow. When necessary, specific cooling techniques are included in the stacks in order to maintain the junction temperature below its maximum operational limit.
Based on each stack mechanical characteristics and materials, the thermal characteristics are first simulated thanks to proprietary software for 3D stack, and the results are checked/verified with real life measurements. The resulting thermal resistance is given for each thermal dissipation path in a steady-state mode.
TJ is the Junction Temperature of the semiconductor device mounted in the module. The Junction is the active Area of the semiconductor device.
Rth(J-A) (Thermal resistance Junction to Ambient) is specified for the worst case condition and where “Ambient” is defined as the temperature at the sides of the module (Top, Bottom or sides).
Rth(J-B) (Thermal resistance Junction to Board) is specified for the worst case condition and where “Board” is defined as the temperature at the bottom of the leads in contact with the PWB board. In that case, the only transfer mode considered is conduction.
In a space environment, there is no convection and the thermal radiation mode is negligible compare to the thermal conduction mode. This is why only conduction mode is considered for Space applications. Thermal models are available on demand for standards products. Specific thermal simulations are performed for SiP stacks in order to support easy integration on customers’ PWBs.
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