<article class="subdiv"> <header id="titre" class="subdiv"> <h1>3d plus space & radiation expertise</h1> </header> <div id="pdfdata" class="subdiv"> <div style="display:inline-block;width:20%;"> <a href="https://it4v7.interactiv-doc.fr/html/catalogue_3d_plus_1126/rna/page/5"><img style="width:100%;" src="./thumbs/5.jpg"></a> </div> </div> <nav id="breadcrumb"> <p>Vous êtes ici : </p> </nav> <main> <p>SPACE EXPERTISE 3D PLUS products and SiPs are used by the major Aerospace Prime contractors systems and equipments manufacturers and space agencies worldwide Recognized for their electrical performance miniaturization quality reliability and radiation assurance level 3D PLUS space qualified products are used in all types of space applications Consumer Applications telecommunication navigation Internet Sustainable Development environment and climate monitoring Defense & Security Earth observation Space transportation launch and manned space vehicles Science astronomy deep space exploration and interplanetary missions RADIATION ASSURANCE With more than 220,000 modules in space as of 2024 and with more than 25 years of flight heritage with no reported failure 3D PLUS is the largest Hybrid space qualified catalog products and customer system-in-packages SIPs manufacturer in Europe In space electronic devices are subject to radiation environment and 3D PLUS Radiation Assurance Policy has been initially set-up for its Radiation Tolerant Products to cover the effects induced by the space radiation environment TOTAL IONIZING DOSE TID Ionization induced in semiconductor materials or associated insulators such as silicon dioxide layers can lead to charge trapping or the formation of interface states at the semiconductor-insulator boundary affecting component behavior or material properties In MOS devices the trapped charge can lead to a shift in the gate threshold voltage and for semiconductors in general interface states can significantly increase device leakage currents The device tolerance depends on the semiconductor technology process diffusion mask and wafer fabrication facility The device tolerance is expressed in krad(Si based on wafer diffusion lot - batch code SINGLE EVENT EFFECTS SEE Effect caused either by direct ionization from a single travelling particle or by recoiling nuclei emitted from a nuclear interaction The device tolerance is dependent on the semiconductor technology process and diffusion mask The device tolerance is expressed in Linear Energy Transfer LET MeV.cm²/mg </p><p>and cross section cm²/device or cm²/bit based on die mask revision The SEE can be distinguished in three main categories Single Event Latch-up SEL Potentially destructive triggering of a parasitic PNPN thyristor structure in a device Single Event Functional Interrupt SEFI Interrupt caused by a single particle strike which leads to a temporary nonfunctionality or interruption of normal operation of the affected device Single Event Upset SEU Single bit flip in a digital element that has been caused either by direct ionization from a traversing article or by a recoiling nuclei emitted from a nuclear interaction Single Event Transient SET A momentary voltage excursion voltage spike at a node in an integrated circuit caused by a single energetic-particle strike 5 </p> </main> <aside> <ul> <li><a href='https://www.3d-plus.com/space-catalog/'>Space Products Catalog- 3D PLUS</a></li> </ul> </aside> <footer> <table width="100%"> <tr> <td width="100%"><a href="http://www.interactiv-technologies.com/interactiv-doc">Interactiv' Doc</a></td> </tr> </table> <ul> <li><a href="./sitemap.html">Plan du site</a></li> </ul> </footer> </article>