DDR TERMINATION REGULATOR PRODUCT OVERVIEW One of the major challenges when using DDR memory system architectures is to ensure signal integrity during data accesses Termination Regulator modules are compact flexible and Rad Hard By Design Able to sink and source current while regulating VTT voltage within the limits defined by JEDEC standards As part of the DDR Ecosystem they efficiently maintain fast transient response times offer a remote sensing function support control via Command pin and provide all power requirements for DDR VTT bus designs KEY BENEFITS Global radiation tolerant solution Highly integrated - All in one Significant board area savings KEY FEATURES Source and sink current capabilities up to ±2 A JEDEC compliant solution Thermal protection Eliminate the need for external capacitors SEE MeV.cm²/mg
Package TID krad(Si Output current DDR Technology Input voltage SOP 24 BGA 127 BGA 259 BGA 259 80 62.5
62.5
62.5
50 50 100 100 1.6
to 2.8
V 1.6
to 2.8
V 1.2
to 1.65
V 1.1
to 1.3
V DDR2 DDR2 DDR3 DDR4 ± 1A ± 1A ± 2A ± 2A P/N 3DPM0237 3DPM0318 3DPM0385 3DPM0424 Temperature C I S Specific temperature range -40 C to 105 C 37