<article class="subdiv"> <header id="titre" class="subdiv"> <h1>Caspex 12m caspex swir caspex 4m p/n sensor 3dcm734 mono /3dcm739</h1> </header> <div id="pdfdata" class="subdiv"> <div style="display:inline-block;width:20%;"> <a href="https://it4v7.interactiv-doc.fr/html/catalogue_3d_plus_1126/rna/page/29"><img style="width:100%;" src="./thumbs/29.jpg"></a> </div> </div> <nav id="breadcrumb"> <p>Vous êtes ici : </p> </nav> <main> <p>CASPEX 12M CASPEX SWIR CASPEX 4M P/N SENSOR 3DCM734 Mono /3DCM739 RGB 3DCM878 Mono / 3DCM879 RGB 3DCM880 2048 x 2048 pixels VIS CMOS Global shutter Mono/RGB 4096 H x 3000 V pixels VIS CMOS Global shutter Mono/RGB 1280 H x 1024 V pixels VIS-NIR Global shutter InGaAs 400-1000 nm 400-1000 nm SPECTRAL BANDWIDTH 400-1800 nm READ NOISE DARK CURRENT 25 C FWC ELECTRONIC ARCHITECTURE 13 e- 125 e-/s 13,5 ke- 2 e- 10 e-/s 15 ke- 240 e- 30 ke-/s 170 ke- Microchip ProASIC 3 1 Gbit SDRAM - 8 Gbit NAND Flash AMD-Xilinx KU040 Ultrascale 8 Gbit DDR3 SDRAM - 48 Gbit Synchro- nous NAND Flash AMD-Xilinx KU040 Ultrascale 8 Gbit DDR3 SDRAM - 48 Gbit Syn- chronous NAND Flash 68 fps 8 bit/pixel 60 fps 10 bit/pixel 46 fps 12 bit/pixel 4.5 </p><p>to 5.5 </p><p>V 5 W 15 fps 10 bit/pixel 7 fps 12 bit/pixel MAXIMUM HARDWARE FRAME RATE FULL RESOLUTION 4.5 </p><p>to 9 V 1.5 </p><p>W POWER SUPPLY POWER CONSUMPTION 25 C 55 pins PGA 12 LVDS pairs 13 GPIO JTAG 77 pins PGA 22 LVDS pairs JTAG Thermistor interface ELECTRICAL INTERFACE -40 to +70 C -55 to +70 C Extended 40 krad SEL LET 62.5 </p><p>MeV.cm²/mg </p><p>-40 to +70 C TEMPERATURE RANGE 30 krad SEL LET 62.5 </p><p>MeV.cm²/mg </p><p>RADIATION PERFORMANCES 135 fps 8 bit/pixel 125 fps 10 bit/pixel 71 fps 12 bit/pixel 4.5 </p><p>to 5.5 </p><p>V 5 W 77 pins PGA 22 LVDS pairs JTAG Thermistor interface -40 to +70 C -55 to +70 C Extended 40 krad SEL LET 62.5 </p><p>MeV.cm²/mg </p><p>SIZE MASS 35x35x23 mm³ 40x40x45 mm³ 40x40x50 mm³ 62 g 125 g 140 g CASPEX DEVELOPMENT TOOLS AND OPTIONS FPGA Design and IP Cores 3D PLUS CASPEX camera heads products come with several options for FPGA configuration and design development FPGA designs and IP Cores are developed based on ECSS-Q-ST-60-02C ESA development standard Standard FPGA Designs 3D PLUS offers for its CASPEX camera heads standard FPGA designs to provide a simple and efficient turn-key solution allowing quick integration and reduced time-to-market 3D PLUS standard FPGA designs for the CASPEX products allow a straightforward management of the sensor and internal memories of the camera head and provides a standard SpaceWire interface for easy interfacing with space equipments and platforms IP Cores 3D PLUS offers for its CASPEX camera heads validated building blocks allowing users to have readily available controllers to develop their custom FPGA designs Evaluation kit 3D PLUS CASPEX camera heads products comes with several options for FPGA configuration and design development FPGA designs and IP Cores are developed based on ECSS-Q-ST-60-02C ESA development standard 29 </p> </main> <aside> <ul> <li><a href='https://www.3d-plus.com/space-catalog/'>Space Products Catalog- 3D PLUS</a></li> </ul> </aside> <footer> <table width="100%"> <tr> <td width="100%"><a href="http://www.interactiv-technologies.com/interactiv-doc">Interactiv' Doc</a></td> </tr> </table> <ul> <li><a href="./sitemap.html">Plan du site</a></li> </ul> </footer> </article>