Reliable Miniaturization Technologies for Electronics
3D Plus engineering teams participate in diverse symposiums and conferences throughout the year. You are welcomed to attend their presentations. The associated White Papers are provided in this table for direct download.
- High-Density Packaging for Spaceborne Electronics
High-Density Stacking for High-Reliability Applications and Radiation Hardness Assurance Using Stack Technology
C. VAl (3D Plus) - J. Benedetto (Aeroflex UTMC)
- Very High Speed 3D System-In-Package (SiP)
Analysis of the signal integrity and the EMI/EMC aspects of a 3-D module made by stacking four layers of 256 Mbits SDRAM Small Outline Packages
- 3D System-in-Package : Technology Improvements for Volume Manufacturing
Vertical InteGration of Optoelectronic and Radio (sub)systems with the 3D Plus System-In-Package (SiP) Technology
- 3D Packaging Technology for Integrated Antenna Front-Ends
Development of a new concept of integrated antenna feed in Ka band with the 3D Plus System-In-Package (SiP) Technology
- Ultra Small System-In-Package for Medical Applications
SMTA Presentation - Anaheim/USA
- Stacking technique of known good rebuilt wafers without Thru-Silicon Via Commercial Applications
This new approach of wafer stacking without thru-silicon via (TSV) allows to stack any type of standard dice, whatever their sizes. It additionally allows to stack 10 levels per mm.(100 microns per levels).
This process allows to stack Known Good Rebuilt Wafer (KGRW) - tested and screened Wafers.